
(PKG of 10) MC14015BCP Dual 4-Bit Static Shift Register, CD4015, PDIP-16, Motorola
Package of 10!
New old stock (NOS), unused, genuine part: Motorola MC14015BCP
Manufacturer: Motorola
Manufacturer Part Number: MC14015BCP
Product Category: Counter Shift Registers
Logic Family: CD4000 (CD4015)
Logic Type: CMOS
Counting Sequence: Serial to Parallel
Number of Circuits: 2
Number of Bits: 4 bit
Package / Case: PDIP-16, Plastic
RoHS: NO
Packaging: Anti-Static
The MC14015B dual 4−bit static shift register is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. It consists of two identical, independent 4−state serial−input/parallel−output registers. Each register has independent Clock and Reset inputs with a single serial Data input. The register states are type D master−slave flip−flops. Data is shifted from one stage to the next during the positive−going clock transition. Each register can be cleared when a high level is applied on the Reset line. These complementary MOS shift registers find primary use in buffer storage and serial−to−parallel conversion where low power dissipation and/or noise immunity is desired.
Note: Date code may differ from picture. Part Number and Manufacturer are identical to what is shown.
Description
Package of 10!
New old stock (NOS), unused, genuine part: Motorola MC14015BCP
Manufacturer: Motorola
Manufacturer Part Number: MC14015BCP
Product Category: Counter Shift Registers
Logic Family: CD4000 (CD4015)
Logic Type: CMOS
Counting Sequence: Serial to Parallel
Number of Circuits: 2
Number of Bits: 4 bit
Package / Case: PDIP-16, Plastic
RoHS: NO
Packaging: Anti-Static
The MC14015B dual 4−bit static shift register is constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. It consists of two identical, independent 4−state serial−input/parallel−output registers. Each register has independent Clock and Reset inputs with a single serial Data input. The register states are type D master−slave flip−flops. Data is shifted from one stage to the next during the positive−going clock transition. Each register can be cleared when a high level is applied on the Reset line. These complementary MOS shift registers find primary use in buffer storage and serial−to−parallel conversion where low power dissipation and/or noise immunity is desired.
Note: Date code may differ from picture. Part Number and Manufacturer are identical to what is shown.
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